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I can see you have used this module more than once. It looks like it uses the Parse::RecDescent module. I'm going to read up on this one now. I've started to poke into the file structure now and see that it's not as cut and dry as I expected... I started to remember this as I reviewed my old code... ugggly. Anyway, I realized that I need to set up some matches for different keys because they actually have implied vars based on the key name. I'm guessing the module can handel this. I really want to learn this methodology since it seems much quicker to setup once I get my head wrapped around it. I'm going to drop a bit more of a real example.
(kicad_pcb (version 3) (host pcbnew "(2013-jul-07)-stable") (general (links 195) (no_connects 0) (area 0 0 0 0) (thickness 1.6) (drawings 32) (tracks 561) (zones 0) (modules 90) (nets 45) ) (page A3) (layers (15 F.Cu signal) (0 B.Cu signal) (16 B.Adhes user) (17 F.Adhes user) (18 B.Paste user) (19 F.Paste user) (20 B.SilkS user) (21 F.SilkS user) (22 B.Mask user) (23 F.Mask user) (24 Dwgs.User user) (25 Cmts.User user) (26 Eco1.User user) (27 Eco2.User user) (28 Edge.Cuts user) ) (setup (last_trace_width 0.1524) (user_trace_width 0.3048) (user_trace_width 0.6096) (user_trace_width 0.9144) (user_trace_width 1.2192) (trace_clearance 0.1524) (zone_clearance 0.254) (zone_45_only no) (trace_min 0.1524) (segment_width 0.2) (edge_width 0.1) (via_size 0.6096) (via_drill 0.381) (via_min_size 0.6096) (via_min_drill 0.381) (uvia_size 0.6096) (uvia_drill 0.381) (uvias_allowed no) (uvia_min_size 0.6096) (uvia_min_drill 0.381) (pcb_text_width 0.3) (pcb_text_size 1.5 1.5) (mod_edge_width 0.15) (mod_text_size 1 1) (mod_text_width 0.15) (pad_size 1.5 1.5) (pad_drill 0.6) (pad_to_mask_clearance 0) (aux_axis_origin 148 106.4) (visible_elements FFFFFFBF) (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 0.150000) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) ) (net 0 "") (net 1 +9V) (net 2 /CLK) (net 3 /DO) (net 4 /Data_In) (net 5 /SCL) (net 6 /SDA) (net 7 /SET_Horz) (net 8 /SET_Vert) (net 9 /~Horz_ON) (net 10 /~RESET) (net 11 /~Vert_ON) (net 12 5V_ATTINY84P) (net 13 GND) (net 14 N-000001) (net 15 N-0000018) (net 16 N-0000019) (net 17 N-000002) (net 18 N-0000021) (net 19 N-0000024) (net 20 N-0000026) (net 21 N-0000027) (net 22 N-0000028) (net 23 N-0000029) (net 24 N-000003) (net 25 N-0000030) (net 26 N-0000031) (net 27 N-0000032) (net 28 N-0000034) (net 29 N-0000036) (net 30 N-0000037) (net 31 N-0000038) (net 32 N-0000039) (net 33 N-0000040) (net 34 N-0000041) (net 35 N-0000042) (net 36 N-0000043) (net 37 N-0000044) (net 38 N-0000045) (net 39 N-0000046) (net 40 N-0000047) (net 41 N-0000048) (net 42 N-0000049) (net 43 N-0000050) (net 44 N-000009) (net_class Default "This is the default net class." (clearance 0.1524) (trace_width 0.1524) (via_dia 0.6096) (via_drill 0.381) (uvia_dia 0.6096) (uvia_drill 0.381) (add_net "") (add_net +9V) (add_net /CLK) (add_net /DO) (add_net /Data_In) (add_net /SCL) (add_net /SDA) (add_net /SET_Horz) (add_net /SET_Vert) (add_net /~Horz_ON) (add_net /~RESET) (add_net /~Vert_ON) (add_net 5V_ATTINY84P) (add_net GND) (add_net N-000001) (add_net N-0000018) (add_net N-0000019) (add_net N-000002) (add_net N-0000021) (add_net N-0000024) (add_net N-0000026) (add_net N-0000027) (add_net N-0000028) (add_net N-0000029) (add_net N-000003) (add_net N-0000030) (add_net N-0000031) (add_net N-0000032) (add_net N-0000034) (add_net N-0000036) (add_net N-0000037) (add_net N-0000038) (add_net N-0000039) (add_net N-0000040) (add_net N-0000041) (add_net N-0000042) (add_net N-0000043) (add_net N-0000044) (add_net N-0000045) (add_net N-0000046) (add_net N-0000047) (add_net N-0000048) (add_net N-0000049) (add_net N-0000050) (add_net N-000009) ) (module SOT109-1_fr_NXP (layer F.Cu) (tedit 522A125D) (tstamp 54481CBA) (at 181.4 119 90) (descr SOT353) (path /5438679B) (attr smd) (fp_text reference U101 (at -0.889 0 180) (layer F.SilkS) (effects (font (size 0.50038 0.50038) (thickness 0.12446) ) ) ) (fp_text value 74LV595 (at 1.00076 0 180) (layer F.SilkS) hide (effects (font (size 0.50038 0.50038) (thickness 0.12446))) ) (fp_circle (center 0 0) (end 0.127 0) (layer F.SilkS) (width 0.635 +)) (fp_line (start -2.10058 5.14096) (end 2.10058 5.14096) (layer F.S +ilkS) (width 0.14986)) (fp_line (start 2.10058 5.14096) (end 2.10058 4.9403) (layer F.Sil +kS) (width 0.14986)) (fp_line (start -2.10058 5.14096) (end -2.10058 4.9403) (layer F.S +ilkS) (width 0.14986)) (fp_line (start -2.10058 -5.14096) (end 2.10058 -5.14096) (layer F +.SilkS) (width 0.14986)) (fp_line (start 2.10058 -5.14096) (end 2.10058 -4.9403) (layer F.S +ilkS) (width 0.14986)) (fp_line (start -2.10058 -5.14096) (end -2.10058 -4.9403) (layer F +.SilkS) (width 0.14986)) (fp_circle (center -2.10058 -5.53974) (end -1.99898 -5.53974) (lay +er F.SilkS) (width 0.14986)) (pad 1 smd rect (at -2.64922 -4.445 90) (size 1.30048 0.59944) (layers F.Cu F.Paste F.Mask) (net 20 N-0000026) ) (pad 2 smd rect (at -2.64922 -3.175 90) (size 1.30048 0.59944) (layers F.Cu F.Paste F.Mask) (net 21 N-0000027) ) (pad 3 smd rect (at -2.64922 -1.905 90) (size 1.30048 0.59944) (layers F.Cu F.Paste F.Mask) (net 22 N-0000028) ) (pad 4 smd rect (at -2.64922 -0.635 90) (size 1.30048 0.59944) (layers F.Cu F.Paste F.Mask) (net 23 N-0000029) ) (pad 5 smd rect (at -2.64922 0.635 90) (size 1.30048 0.59944) (layers F.Cu F.Paste F.Mask) (net 25 N-0000030) ) (pad 6 smd rect (at -2.64922 1.905 90) (size 1.30048 0.59944) (layers F.Cu F.Paste F.Mask) (net 26 N-0000031) ) (pad 7 smd rect (at -2.64922 3.175 90) (size 1.30048 0.59944) (layers F.Cu F.Paste F.Mask) (net 27 N-0000032) ) (pad 8 smd rect (at -2.64922 4.445 90) (size 1.30048 0.59944) (layers F.Cu F.Paste F.Mask) (net 13 GND) ) (pad 9 smd rect (at 2.64922 4.445 90) (size 1.30048 0.59944) (layers F.Cu F.Paste F.Mask) (net 44 N-000009) ) (pad 10 smd rect (at 2.64922 3.175 90) (size 1.30048 0.59944) (layers F.Cu F.Paste F.Mask) (net 12 5V_ATTINY84P) ) (pad 11 smd rect (at 2.64922 1.905 90) (size 1.30048 0.59944) (layers F.Cu F.Paste F.Mask) (net 2 /CLK) ) (pad 12 smd rect (at 2.64922 0.635 90) (size 1.30048 0.59944) (layers F.Cu F.Paste F.Mask) (net 7 /SET_Horz) ) (pad 13 smd rect (at 2.64922 -0.635 90) (size 1.30048 0.59944) (layers F.Cu F.Paste F.Mask) (net 9 /~Horz_ON) ) (pad 14 smd rect (at 2.64922 -1.905 90) (size 1.30048 0.59944) (layers F.Cu F.Paste F.Mask) (net 4 /Data_In) ) (pad 15 smd rect (at 2.64922 -3.175 90) (size 1.30048 0.59944) (layers F.Cu F.Paste F.Mask) (net 28 N-0000034) ) (pad 16 smd rect (at 2.64922 -4.445 90) (size 1.30048 0.59944) (layers F.Cu F.Paste F.Mask) (net 12 5V_ATTINY84P) ) ) )

In reply to Re^2: Parsing a file with parentheses to build a hash by xcellsior
in thread Parsing a file with parentheses to build a hash by xcellsior

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