$date
	Fri Aug  1 17:33:57 2014

$end
$version
	ncsim 08.20-s012
$end
$timescale
	1ps
$end
$scope module system $end
$scope module soc $end
$scope module newton_analog_atop $end
$var wire 1 ! BBPLL_CLKO_DIG_96M $end
$var wire 1 " CKO_HFOSC_2DIV12 $end
$var wire 1 # CLKO_RXADC_96M $end
$var wire 1 $ VBGOK_H $end
$var wire 1 % YOUT_RC_CAL $end
$var wire 1 & YOUT_RC_CAL_PGA $end
$var wire 1 ' ABB_BIAS_EN $end
$var wire 1 ( TXMIX_EN $end
$var wire 1 ) XO32K_VCOUT $end
$var wire 3 * AGC_IF_CAP [2:0] $end
$var wire 2 + BBAGC_AVWIN [1:0] $end
$upscope $end
$upscope $end
$upscope $end
$scope module system $end
$scope module soc $end
$scope module newton_analog_atop $end
$var wire 3 * AGC_IF_CAP [2:0] $end
$var wire 2 + BBAGC_AVWIN [1:0] $end
$upscope $end
$upscope $end
$upscope $end
$enddefinitions $end
$dumpvars
x!
bxx +
x#
x'
x(
x$
x)
bxxx *
x"
x%
x&
$end
$dumpoff $end