#!/usr/bin/perl use strict; use warnings; my $inputfile_one = $ARGV[0]; # input lib FILE my $inputfile_two = $ARGV[1]; # input lib FILE my $pin_name; my $counter = 0; if ($#ARGV!=1) { print "USAGE :: perl lib_marge.pl <> <> \n\n" ; exit(1); } mkdir 'tmpdir' unless -d 'tmpdir'; mkdir 'finallib' unless -d 'finallib'; my $cmd_1 = "head -n -1 $inputfile_one > tmpdir/$inputfile_one ;"; # Removing the last line from the main lib file system ($cmd_1); open (INFILE_TWO,"<","$inputfile_two") || die "Can not open LIB_FILE_FOR_MARGE"; open (OFILE,">","tmpdir/Output.csv") || die "Can not open Input Text File"; while (my $line = ) { chomp $line; # print "$line \n"; if ($line =~m/^\s*cell\s*\(\"(.*)\"\)/g || $line =~m/^\s*cell\((.*)\)/g || $line =~m/^\s*cell\s*\((.*)\)/g) { $pin_name = $1; chomp $pin_name; $counter = 1; } if ( $counter == 1 ) { print OFILE "$line\n"; } } close INFILE_TWO; close OFILE; my $cmd_2 = "cat tmpdir/$inputfile_one tmpdir/Output.csv > finallib/$inputfile_one ;rm -rf tmpdir"; system ($cmd_2); #### library ("inv_add") { delay_model : lookup_table ; date : "Thu Jun 6 07:25:32 2019" ; lu_table_template (finc_valc) cell (lib_1) { dont_use : true ; dont_touch : true ; pin ("HIZIBI_IN_1") { direction : input ; clock : true ; max_transition : 1 ; capacitance : 12 ; } pin ("HIZIBI_79") { direction : output ; max_transition : 10; min_capacitance : 3 ; } pin ("HIZIBI_IN_1") { direction : input ; clock : true ; max_transition : 1 ; capacitance : 1 ; } pin ("HIZIBI_78") { direction : output ; max_transition : 10; min_capacitance : 34 ; capacitance : 34 ; } pin ("HIZIBI") { direction : output ; clock : true ; max_transition : 20; related_power_pin : VDD ; related_ground_pin : VSS ; timing () { cell_fall (into_f1) { index_1("1,2,3,4,5") ; index_2("1,2,3,4,5") ; values("13, 13, 14, 16, 18",\ "13, 14, 15, 16, 19",\ "14, 15, 16, 17, 20",\ "15, 15, 16, 18, 20",\ "15, 16, 17, 18, 21") ; } } } } } #### library ("inv_add") { delay_model : lookup_table ; date : "Thu Jun 6 07:25:32 2019" ; lu_table_template (finc_valc) cell (lib_2) { dont_use : true ; dont_touch : true ; pin ("HIZIBI_98") { direction : output ; max_transition : 10; min_capacitance : 34 ; capacitance : 34 ; } } } #### library ("inv_add") { delay_model : lookup_table ; date : "Thu Jun 6 07:25:32 2019" ; lu_table_template (finc_valc) cell (lib_1) { dont_use : true ; dont_touch : true ; pin ("HIZIBI_IN_1") { direction : input ; clock : true ; max_transition : 1 ; capacitance : 12 ; } pin ("HIZIBI_79") { direction : output ; max_transition : 10; min_capacitance : 3 ; } pin ("HIZIBI_IN_1") { direction : input ; clock : true ; max_transition : 1 ; capacitance : 1 ; } pin ("HIZIBI_78") { direction : output ; max_transition : 10; min_capacitance : 34 ; capacitance : 34 ; } pin ("HIZIBI") { direction : output ; clock : true ; max_transition : 20; related_power_pin : VDD ; related_ground_pin : VSS ; timing () { cell_fall (into_f1) { index_1("1,2,3,4,5") ; index_2("1,2,3,4,5") ; values("13, 13, 14, 16, 18",\ "13, 14, 15, 16, 19",\ "14, 15, 16, 17, 20",\ "15, 15, 16, 18, 20",\ "15, 16, 17, 18, 21") ; } } } } cell (lib_2) { dont_use : true ; dont_touch : true ; pin ("HIZIBI_98") { direction : output ; max_transition : 10; min_capacitance : 34 ; capacitance : 34 ; } } }