PVT === ffg0p82v100c
mnk_alpha ==== VDD 0.825,VDDQN 1.17,VDDM 1.17
mnk_lib_ss0p905v100c_pg.lib ===== VDDQN  1.1, VDDM  1.1,VSS  0
Bias voltage differences has been observed for VDDQN, VDDM.
Missing Bias voltages 
VSS from mnk_alpha file. 
VDD from mnk_lib_ss0p905v100c_pg.lib file