module soc (PAD_TEST , VDIG_ON , GNDD_ON , VPP_EF , PAD_BOND_OPT );
inout  [31:0] PAD_TEST ;
input  VDIG_ON ;
input  GNDD_ON ;
inout  VPP_EF ;
inout  [5:0] PAD_BOND_OPT ;
endmodule

module analog_atop_wrapper (PAD_VDDTX , PAD_VREFADC , PAD_VSSRF ,
    DPAD_GSUB_XTAL24M , DPAD_GSUB_RX );
inout  PAD_VDDTX ;
inout  PAD_VREFADC ;
inout  PAD_VSSRF ;
inout  DPAD_GSUB_XTAL24M ;
inout  DPAD_GSUB_RX ;
endmodule

module misc_atop_wrapper (VDIG , VRTC , AVDD , EBUS , IOGND , VDIG_ON );
inout  VDIG ;
inout  VRTC ;
inout  AVDD ;
inout  EBUS ;
inout  IOGND ;
input  VDIG_ON ;
endmodule