sub GenerateVerilogFiles{
    my ($self,$blockname)=@_;
    my $fileName = $BlockNameClass->{FileName};
    $BlockNameClass->GetInfo($blockname);
    my $childFlag = ($fileName eq lala) ;
    return if($childFlag) ;
    foreach(my $x keys %{$BlockNameClass->{xxx}}) {
     GenerateVerilogFiles ($x);
    }
   
    }