INFO @1101994 PHResourceLayer_Z7b: DUMMY:Hi this is CORE2  ; T=1101994
INFO @1102266 PHResourceLayer_Z4: mti_clk_chk:################ start of test ################ ; T=1092507
INFO @1102334 PHResourceLayer_Z4: mti_clk_chk:Checking the period of MTI, MTI10 clk from SV; T=1102334
INFO @1102369 PHResourceLayer_Z4: CPRINT:FLAG_SET:Setting flag 1; T=1102369
INFO @1102372 mti_clk_chk:  Checking period of MTI CLk; T=1102372
INFO @1102377 mti_clk_chk: Period value of MTI Clock: 3.125000 ns; T=1102377
INFO @1102377 mti_clk_chk: MTI Clock is being generated correctly ; T=1102377
INFO @1102377 mti_clk_chk:  Checking period of MTI10 CLk; T=1102377
INFO @1102409 PHResourceLayer_Z4: CPRINT:FLAG WAIT:Waiting flag 2 status is 0; T=1102409
INFO @1102418 mti_clk_chk: Period value of MTI10 Clock: 31.250000 ns; T=1102418
INFO @1102418 mti_clk_chk: MTI10 Clock is being generated correctly ; T=1102418
INFO @1102418 PHResourceLayer_Z4: FLAG_CLEAR: Clearing flag 1; T=1102418
INFO @1102418 PHResourceLayer_Z4: FLAG_SET: Setting flag 2; T=1102418
INFO @1102418 PHResourceLayer_Z4: FLAG_SET: Check flag 1; T=1102418
INFO @1148661 mti_clk_chk: C-Code exit execution. code=<aa>; T=1148661
INFO @1148661 mti_clk_chk: ************************  SV END******************** ; T=1148661
INFO @1148661 testbench.soc_monitors_inst: DMA multi loop check start; T=1148661
INFO @1148661 testbench.soc_monitors_inst.ASSERT_IPD_REQ_PERIPH_DMA_CH_MUX_0: Assertion ASSERT_IPD_REQ_PERIPH_DMA_CH_MUX_0 PASSED; T=1148661
INFO @1148661 testbench.soc_monitors_inst.ASSERT_IPD_REQ_PERIPH_DMA_CH_MUX_1: Assertion ASSERT_IPD_REQ_PERIPH_DMA_CH_MUX_1 PASSED; T=1148661
INFO @1148661 mti_lane2_bw_mon: total bytes = 0, at time = 1148661; T=1148661
INFO @1148661 mti_lane2_bw_mon: time window = 0, at time = 1148661; T=1148661
INFO @1148661 mti_lane2_bw_mon: BW in Mbps = 0, at time = 1148661; T=1148661
INFO @1148662 END_TESTCASE: Warns= 0; T=1148662
INFO @1148662 END_TESTCASE: Errors= 0; T=1148662
INFO @1148662 END_TESTCASE: Fatals= 0; T=1148662
INFO @1148662 END_TESTCASE:    TESTCASE PASS    ; T=1148662
INFO @1148662 END_TESTCASE: Testcase completed Successfully; T=1148662