Module: gg_PCI_PORT_bc_unit_224 [bc_pci_u3/bc_unit_u49] Net: inp_d_1 Max Capacitance = 0.61 (bc_0:A2 [NAN2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_1:A2 [EXOR2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_2:A2 [NOR2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_3:A2 [NAN2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_4:A2 [NOR2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Transition = 1.50 (bc_0:A2 [NAN2D1]) Pin Worst Transition = 7.60 VIOLATION = -6.10 Max Transition = 1.50 (bc_1:A2 [EXOR2D1]) Pin Worst Transition = 7.60 VIOLATION = -6.10 Max Transition = 1.50 (bc_2:A2 [NOR2D1]) Pin Worst Transition = 7.60 VIOLATION = -6.10 Max Transition = 1.50 (bc_3:A2 [NAN2D1]) Pin Worst Transition = 7.59 VIOLATION = -6.09 Max Transition = 1.50 (bc_4:A2 [NOR2D1]) Pin Worst Transition = 7.59 VIOLATION = -6.09 Net: inp_c_1 Max Capacitance = 0.61 (bc_0:A1 [NAN2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_1:A1 [EXOR2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_2:A1 [NOR2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_3:A1 [NAN2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_4:A1 [NOR2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_flop_reg_reg:RB [SDFRPQ1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Transition = 1.50 (bc_0:A1 [NAN2D1]) Pin Worst Transition = 7.60 VIOLATION = -6.10 Max Transition = 1.50 (bc_1:A1 [EXOR2D1]) Pin Worst Transition = 7.60 VIOLATION = -6.10 Max Transition = 1.50 (bc_2:A1 [NOR2D1]) Pin Worst Transition = 7.60 VIOLATION = -6.10 Max Transition = 1.50 (bc_3:A1 [NAN2D1]) Pin Worst Transition = 7.59 VIOLATION = -6.09 Max Transition = 1.50 (bc_4:A1 [NOR2D1]) Pin Worst Transition = 7.59 VIOLATION = -6.09 Max Transition = 1.50 (bc_flop_reg_reg:RB [SDFRPQ1]) Pin Worst Transition = 7.59 VIOLATION = -6.09 Module: gg_PCI_PORT_bc_unit_223 [bc_pci_u3/bc_unit_u48] Net: inp_d_1 Max Capacitance = 0.61 (bc_0:A2 [NAN2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_1:A2 [EXOR2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_2:A2 [NOR2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_3:A2 [NAN2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_4:A2 [NOR2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Transition = 1.50 (bc_0:A2 [NAN2D1]) Pin Worst Transition = 7.58 VIOLATION = -6.08 Max Transition = 1.50 (bc_1:A2 [EXOR2D1]) Pin Worst Transition = 7.59 VIOLATION = -6.09 Max Transition = 1.50 (bc_2:A2 [NOR2D1]) Pin Worst Transition = 7.59 VIOLATION = -6.09 Max Transition = 1.50 (bc_3:A2 [NAN2D1]) Pin Worst Transition = 7.59 VIOLATION = -6.09 Max Transition = 1.50 (bc_4:A2 [NOR2D1]) Pin Worst Transition = 7.59 VIOLATION = -6.09 Net: inp_c_1 Max Capacitance = 0.61 (bc_0:A1 [NAN2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_1:A1 [EXOR2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_2:A1 [NOR2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_3:A1 [NAN2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_4:A1 [NOR2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_flop_reg_reg:RB [SDFRPQ1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Transition = 1.50 (bc_0:A1 [NAN2D1]) Pin Worst Transition = 7.58 VIOLATION = -6.08 Max Transition = 1.50 (bc_1:A1 [EXOR2D1]) Pin Worst Transition = 7.59 VIOLATION = -6.09 Max Transition = 1.50 (bc_2:A1 [NOR2D1]) Pin Worst Transition = 7.59 VIOLATION = -6.09 Max Transition = 1.50 (bc_3:A1 [NAN2D1]) Pin Worst Transition = 7.59 VIOLATION = -6.09 Max Transition = 1.50 (bc_4:A1 [NOR2D1]) Pin Worst Transition = 7.58 VIOLATION = -6.08 Max Transition = 1.50 (bc_flop_reg_reg:RB [SDFRPQ1]) Pin Worst Transition = 7.58 VIOLATION = -6.08 Module: gg_PCI_PORT_bc_unit_222 [bc_pci_u3/bc_unit_u47] Net: inp_d_1 Max Capacitance = 0.61 (bc_0:A2 [NAN2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_1:A2 [EXOR2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_2:A2 [NOR2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_3:A2 [NAN2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_4:A2 [NOR2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Transition = 1.50 (bc_0:A2 [NAN2D1]) Pin Worst Transition = 7.52 VIOLATION = -6.02 Max Transition = 1.50 (bc_1:A2 [EXOR2D1]) Pin Worst Transition = 7.53 VIOLATION = -6.03 Max Transition = 1.50 (bc_2:A2 [NOR2D1]) Pin Worst Transition = 7.53 VIOLATION = -6.03 Max Transition = 1.50 (bc_3:A2 [NAN2D1]) Pin Worst Transition = 7.53 VIOLATION = -6.03 Max Transition = 1.50 (bc_4:A2 [NOR2D1]) Pin Worst Transition = 7.53 VIOLATION = -6.03 Net: inp_c_1 Max Capacitance = 0.61 (bc_0:A1 [NAN2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_1:A1 [EXOR2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_2:A1 [NOR2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_3:A1 [NAN2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_4:A1 [NOR2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_flop_reg_reg:RB [SDFRPQ1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Transition = 1.50 (bc_0:A1 [NAN2D1]) Pin Worst Transition = 7.53 VIOLATION = -6.03 Max Transition = 1.50 (bc_1:A1 [EXOR2D1]) Pin Worst Transition = 7.54 VIOLATION = -6.04 Max Transition = 1.50 (bc_2:A1 [NOR2D1]) Pin Worst Transition = 7.53 VIOLATION = -6.03 Max Transition = 1.50 (bc_3:A1 [NAN2D1]) Pin Worst Transition = 7.53 VIOLATION = -6.03 Max Transition = 1.50 (bc_4:A1 [NOR2D1]) Pin Worst Transition = 7.53 VIOLATION = -6.03 Max Transition = 1.50 (bc_flop_reg_reg:RB [SDFRPQ1]) Pin Worst Transition = 7.52 VIOLATION = -6.02 Module: gg_PCI_PORT_bc_unit_221 [bc_pci_u3/bc_unit_u46] Net: inp_d_1 Max Capacitance = 0.61 (bc_0:A2 [NAN2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_1:A2 [EXOR2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_2:A2 [NOR2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_3:A2 [NAN2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_4:A2 [NOR2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Transition = 1.50 (bc_0:A2 [NAN2D1]) Pin Worst Transition = 7.47 VIOLATION = -5.97 Max Transition = 1.50 (bc_1:A2 [EXOR2D1]) Pin Worst Transition = 7.48 VIOLATION = -5.98 Max Transition = 1.50 (bc_2:A2 [NOR2D1]) Pin Worst Transition = 7.47 VIOLATION = -5.97 Max Transition = 1.50 (bc_3:A2 [NAN2D1]) Pin Worst Transition = 7.48 VIOLATION = -5.98 Max Transition = 1.50 (bc_4:A2 [NOR2D1]) Pin Worst Transition = 7.48 VIOLATION = -5.98 Net: inp_c_1 Max Capacitance = 0.61 (bc_0:A1 [NAN2D1]) Net Capacitance = 6.04 VIOLATION = -5.43 Max Capacitance = 0.61 (bc_1:A1 [EXOR2D1]) Net Capacitance = 6.04