%Error: top.v:10: Cannot find buffer
%Error: top.v:9: Cannot find inverter
%Error: top.v:10: Module reference not found: buffer
%Error: top.v:9: Module reference not found: inverter
Exiting due to errors
Module names in netlist:
top

ModuleName=top  HierInstName=top
   PortDir=input PortName=a
   PortDir=input PortName=b
   PortDir=output PortName=c
   PortDir=output PortName=d
    PinName=in_b NetName=b
    PinName=out_d NetName=d
    PinName=in_a NetName=a
    PinName=out_c NetName=c