Hello kshitij

I process this by splitting the lines up through a while loop. The logic starts to get confusing as you are essentially dealing with 3 dimensions of data here.

Tracking the loop through debugger also helped greatly to identify what was being kept track of and where it was ending up.

I have also added extraction routine to make a table. There are multiple patterns for each register, so in a sense this is a three-dimensional data, as there is a 2 dimensional 3 x 5 pattern table for each register.

Using sprintf would be next step for a nice layout. Also a little more effort to just get the Registry as a single key to the table. Forgoing those, I hope think this is the kind of logic you are looking for

#!perl

use strict;
use warnings;

my $patflip = 1;
my $pat;
my $reppat = 1;
my $reg;
my @abc;
my %regpat = ();

while( defined ( my $line = <DATA> ) ){

 chomp $line;
 #print "line: $line";

 if($line =~ /\Apat(.)/ ){
     $patflip++ <= 5 or $patflip = 0;  
     $pat = $1;  
  #   print "pat: $pat ";    
     next;
  }

 if($line =~ s/\A.*?reg_([0-7]).*\}//){
  
   $reg = $1;  
#   print "reg: $1 ";
#  print "line in ifline $line\n"; 
   @abc = split( '', $line, 3 ); 
#  print Data::Dumper->Dump( [\@abc], ['*abc'] );
   for my $hi (1..3){
     push @{ $regpat{'r'.$reg}{'pat'.$hi} }, shift @abc;
   
   }
 }     

}

use Data::Dumper;

#print Data::Dumper->Dump ([\%regpat],['*regpat']);
print "Reg    p1  p2  p3  p4  p5\n";
#my $reppat = 1;
foreach my $regkey ( sort keys %regpat ){
  
  foreach my $patkey ( sort keys %{ $regpat{$regkey} } ){
   print $regkey."  p" . $reppat++ .' ';

   for my $ind (0..4){

      print $regpat{$regkey}{$patkey}[$ind] . '   ';    
 
    }   
print "\n";
    }
$reppat = 1; 
print "\n";  
  }

__DATA__
pat1 
U_TOP_LOGIC/i_reg_2_/Q : #  {111111}111
pat2 
U_TOP_LOGIC/i_reg_2_/Q : #  {110111}111
pat3 
U_TOP_LOGIC/i_reg_2_/Q : #  {110111}011
pat4
U_TOP_LOGIC/i_reg_2_/Q : #  {110111}101
pat5
U_TOP_LOGIC/i_reg_2_/Q : #  {110111}110
pat1 
U_TOP_LOGIC/i_reg_3_/Q : #  {111111}110
pat2
U_TOP_LOGIC/i_reg_3_/Q : #  {111111}111
pat3 
U_TOP_LOGIC/i_reg_3_/Q : #  {111111}101
pat4
U_TOP_LOGIC/i_reg_3_/Q : #  {111111}110
pat5
U_TOP_LOGIC/i_reg_3_/Q : #  {111111}111
pat1 
U_TOP_LOGIC/i_reg_4_/Q : #  {111111}111
pat2 
U_TOP_LOGIC/i_reg_4_/Q : #  {111111}011
pat3
U_TOP_LOGIC/i_reg_4_/Q : #  {111111}111
pat4
U_TOP_LOGIC/i_reg_4_/Q : #  {111111}011
pat5
U_TOP_LOGIC/i_reg_4_/Q : #  {111111}111

---

Reg    p1  p2  p3  p4  p5
r2  p1 1   1   0   1   1
r2  p2 1   1   1   0   1
r2  p3 1   1   1   1   0

r3  p1 1   1   1   1   1
r3  p2 1   1   0   1   1
r3  p3 0   1   1   0   1

r4  p1 1   0   1   0   1
r4  p2 1   1   1   1   1
r4  p3 1   1   1   1   1
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