The 6502 had a zero page addressing mode for the first 256 bytes. One could use this space as pseudo registers.

An MMU switching between 64k memory blocks would need to preserve them "globally" to allow data transfer.

This wouldn't be very fast and only a reasonable approach for a MacGyver scenario.

Like if a strange natural disaster or God's will burnt all newer CPUs and miraculously spared only the 6502s family of processors ;-)