I like the first one you wrote, i hadn't come across that operator. Seems exactly the same as a conditional statement in Verilog. So it's still pretty readable to me!

Regarding your footnote, supposing i didn't need 0 for false, how would i do it? And how else can you represent false?

Thanks very much for your very helpful reply.

In reply to Re^2: A more concise way to map the contents of an array. by Amblikai
in thread A more concise way to map the contents of an array. by Amblikai

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