#!/usr/bin/env perl use strict; use warnings; use autodie; my $report_file = 'pm_1080084_timing_manual.rpt'; my %PG; local $/ = "\nStartpoint"; open my $fh, '<', $report_file; while (<$fh>) { /[(](\w+)[^(]+[(](\w+)[^:]+:\s+(\w+).*?slack[^-]+(-\d+)/s; $PG{$3}{"$1-$2"} = $4; } use Data::Dump; dd \%PG; -------------------------------------------------------- This outputs -------------------------------------------------------- { PLBCLK => { "input-output" => -4, "rising-output" => -3 }, PLBCLK1 => { "input-rising" => -1, "rising-rising" => -2 }, } *********************************************************** TIMING REPORT FROM WHERE I WANT EXTRACT ALL INFO. *********************************************************** Startpoint: PLB4ARB8M_ARB_TOP1 (input port edge-triggered flip-flop clocked by PLBCLK1) Endpoint: PLB4ARB8M_ARB_TOP1/reg_PLB_WrBusControlStates_reg[9] (rising edge-triggered flip-flop clocked by PLBCLK1) Path Group: PLBCLK1 Path Type: max Point Incr P +ath -------------------------------------------------------------------- +------ 0.00 2 +.80 r library setup time -1.54 1 +.26 data required time 1 +.26 -------------------------------------------------------------------- +------ data required time 1 +.26 data arrival time -3 +.24 -------------------------------------------------------------------- +------ slack (VIOLATED) -1 Startpoint: PLB4ARB8M_ARB_TOP1/reg_PLB_pacr_reg[2] (rising edge-triggered flip-flop clocked by PLBCLK1) Endpoint: PLB4ARB8M_ARB_TOP1/reg_PLB_pesr_reg[10] (rising edge-triggered flip-flop clocked by PLBCLK1) Path Group: PLBCLK1 Path Type: max Point Incr P +ath -------------------------------------------------------------------- +------ clock PLBCLK1 (rise edge) 0.00 0 +.00 clock network delay (ideal) 0.00 0 +.00 -------------------------------------------------------------------- +------ data required time 2 +.73 data arrival time -3 +.65 -------------------------------------------------------------------- +------ slack (VIOLATED) -2 Startpoint: PLB4ARB8M_ARB_TOP1/reg_PLB_pacr_reg[2] (rising edge-triggered flip-flop clocked by PLBCLK1) Endpoint: PLB4ARB8M_ARB_TOP1 (output port edge-triggered flip-flop clocked by PLBCLK1) Path Group: PLBCLK Path Type: max Point Incr P +ath -------------------------------------------------------------------- +------ clock PLBCLK1 (rise edge) 0.00 0 +.00 clock network delay (ideal) 0.00 0 +.00 PLB4ARB8M_ARB_TOP1/reg_PLB_pacr_reg[2]/CLK (DFFX1) 0.00 0 +.00 r data arrival time -3 +.24 -------------------------------------------------------------------- +------ slack (VIOLATED) -3 Startpoint: CPU_DCRADDR[8] (input port clocked by DCRDATA) Endpoint: PLB_DCRDATA[9] (output port clocked by DCRDATA) Path Group: PLBCLK Path Type: max Point Incr Path ----------------------------------------------------------- clock DCRDATA (rise edge) 0.00 0.00 ----------------------------------------------------------- data required time 1.14 data arrival time -1.46 ----------------------------------------------------------- slack (VIOLATED) -4
*********************************************************** modified TIMING REPORT FROM WHERE I WANT EXTRACT ALL INFO. *********************************************************** Startpoint: PLB4ARB8M_ARB_TOP1 (input port edge-triggered flip-flop clocked by PLBCLK1) Endpoint: PLB4ARB8M_ARB_TOP1/reg_PLB_WrBusControlStates_reg[9] (rising edge-triggered flip-flop clocked by PLBCLK1) Path Group: PLBCLK1 Path Type: max Point Incr P +ath -------------------------------------------------------------------- +------ 0.00 2 +.80 r library setup time -1.54 1 +.26 data required time 1 +.26 -------------------------------------------------------------------- +------ data required time 1 +.26 data arrival time -3 +.24 -------------------------------------------------------------------- +------ slack (VIOLATED) -1 Startpoint: PLB4ARB8M_ARB_TOP1/reg_PLB_pacr_reg[2] (rising edge-triggered flip-flop clocked by PLBCLK1) Endpoint: PLB4ARB8M_ARB_TOP1/reg_PLB_pesr_reg[10] (rising edge-triggered flip-flop clocked by PLBCLK1) Path Group: PLBCLK1 Path Type: max Point Incr P +ath -------------------------------------------------------------------- +------ clock PLBCLK1 (rise edge) 0.00 0 +.00 clock network delay (ideal) 0.00 0 +.00 -------------------------------------------------------------------- +------ data required time 2 +.73 data arrival time -3 +.65 -------------------------------------------------------------------- +------ slack (VIOLATED) -2 Startpoint: PLB4ARB8M_ARB_TOP1/reg_PLB_pacr_reg[2] (rising edge-triggered flip-flop clocked by PLBCLK1) Endpoint: PLB4ARB8M_ARB_TOP1 (output port edge-triggered flip-flop clocked by PLBCLK1) Path Group: PLBCLK Path Type: max Point Incr P +ath -------------------------------------------------------------------- +------ clock PLBCLK1 (rise edge) 0.00 0 +.00 clock network delay (ideal) 0.00 0 +.00 PLB4ARB8M_ARB_TOP1/reg_PLB_pacr_reg[2]/CLK (DFFX1) 0.00 0 +.00 r data arrival time -3 +.24 -------------------------------------------------------------------- +------ slack (VIOLATED) -3 Startpoint: CPU_DCRADDR[8] (input port clocked by DCRDATA) Endpoint: PLB_DCRDATA[9] (output port clocked by DCRDATA) Path Group: PLBCLK Path Type: max Point Incr Path ----------------------------------------------------------- clock DCRDATA (rise edge) 0.00 0.00 ----------------------------------------------------------- data required time 1.14 data arrival time -1.46 ----------------------------------------------------------- slack (VIOLATED) -4
In reply to regexp with Hash dout by mak.jordan
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