I'm glad you like the module!

This gets you a little further: 

use warnings;
use strict;
use Verilog::VCD qw(:all);

my $vcd= parse_vcd('sample.vcd');
my $i = 0;
for my $code (keys %{ $vcd }) {
    for my $net (@{ $vcd->{$code}->{nets} }) {
        print "V$i ($net->{name}) vsource type=pwl wave=[0p 0]\n";
        $i++;
    }
}

__END__

V0 (VBGOK_H) vsource type=pwl wave=[0p 0]
V1 (YOUT_RC_CAL) vsource type=pwl wave=[0p 0]
V2 (CLKO_RXADC_96M) vsource type=pwl wave=[0p 0]
V3 (AGC_IF_CAP[2:0]) vsource type=pwl wave=[0p 0]
V4 (AGC_IF_CAP[2:0]) vsource type=pwl wave=[0p 0]
V5 (BBAGC_AVWIN[1:0]) vsource type=pwl wave=[0p 0]
V6 (BBAGC_AVWIN[1:0]) vsource type=pwl wave=[0p 0]
V7 (CKO_HFOSC_2DIV12) vsource type=pwl wave=[0p 0]
V8 (XO32K_VCOUT) vsource type=pwl wave=[0p 0]
V9 (YOUT_RC_CAL_PGA) vsource type=pwl wave=[0p 0]
V10 (ABB_BIAS_EN) vsource type=pwl wave=[0p 0]
V11 (TXMIX_EN) vsource type=pwl wave=[0p 0]
V12 (BBPLL_CLKO_DIG_96M) vsource type=pwl wave=[0p 0]

[download]

If you need more help, you have to describe what your desired "wave=..." means. How does this relate to your VCD file data? How does "199p" relate to your VCD data for BBPLL_CLKO_DIG_96M? Show the code you've written and describe in detail how your actual output differs from your desired output.

In reply to Re^5: extract text from multi-line context (Verilog::VCD) by toolic
in thread extract text from multi-line context by herman4016

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