Hello Monks,
I have written a perl utility which is able to read “mnk_alpha” file to extract some information (PVT {ffg0p82v100c etc}, bias voltages {VDD, VDDQN etc} ), can find files inside provided “cell_name” directory and after then can able to print the corresponding PVT and bias voltages.
The intention of the utility is
It must compare the bias voltages, which is present in “mnk_alpha” and those files which are present inside of <cell_name>/lib_pg/ directory.
Like if you see, in “mnk_alpha” file, for ffg0p82v100c PVT, the bias voltages are VDD = 0.825, VDDQN = 1.17, VDDM = 1.17 and inside <cell_name>/lib_pg/ directory we have “mnk_lib/lib_pg/mnk_lib_ss0p905v100c_pg.lib” file. Now it will find “voltage_map” from the file, it will grep the bias voltage values (in this case VDDQN = 1.1, VDDM = 1.1 and VSS = 0) and will compare against the bias voltages from “mnk_alpha” and will print if those voltages are correct or not. Also it must print if any voltages are missing from any file. Like for all the cases VDD is missing in “mnk_lib/lib_pg/mnk_lib_ss0p905v100c_pg.lib” file and VSS is missing in “mnk_alpha” file.
The desired output must be look like
PVT === ffg0p82v100c mnk_alpha ==== VDD 0.825,VDDQN 1.17,VDDM 1.17 mnk_lib_ss0p905v100c_pg.lib ===== VDDQN 1.1, VDDM 1.1,VSS 0 Bias voltage differences has been observed for VDDQN, VDDM. Missing Bias voltages VSS from mnk_alpha file. VDD from mnk_lib_ss0p905v100c_pg.lib file
We have given example when the bias voltages are different. It must display the bias voltages are same if it matches. I am not able to compare the bias voltages. Can you folks please guide me?
mnk_alpha
put cornerData(ffg0p82v100c) {VDD 0.825,VDDQN 1.17,VDDM 1.17,TEMP 100} put cornerData(ssg0p905v100c) {VDD 0.825,VDDQN 1.1,VDDM 0.17,TEMP 100} put cornerData(tt0p40v100c) {VDD 0.825,VDDQN 1.07,VDDM 2.15,TEMP 100}
mnk_lib/lib_pg/mnk_lib_ss0p905v100c_pg.lib
library(mnk_lib_ss0p905v100c) { voltage_map(VDDQN, 1.1); voltage_map(VDDM, 1.1); voltage_map(VSS, 0); pg_pin(VDDQN) { voltage_name : VDDQN ; pg_type : primary_power ; } pg_pin(VSS) { voltage_name : VSS ; pg_type : primary_ground ; } } }
mnk_lib/lib_pg/mnk_lib_ff0p82v100c_pg.lib
library(mnk_lib_ff0p82v100) { voltage_map(VDDQN, 1.1); voltage_map(VDDM, 1.1); voltage_map(VSS, 0); pg_pin(VDDQN) { voltage_name : VDDQN ; pg_type : primary_power ; } pg_pin(VSS) { voltage_name : VSS ; pg_type : primary_ground ; } } }
mnk_lib/lib_pg/mnk_lib_tt0p4v100c_pg.lib
library(mnk_lib_tt0p4v100c) { voltage_map(VDDQN, 1.1); voltage_map(VDDM, 1.1); voltage_map(VSS, 0); pg_pin(VDDQN) { voltage_name : VDDQN ; pg_type : primary_power ; } pg_pin(VSS) { voltage_name : VSS ; pg_type : primary_ground ; } } }
The Perl code is
my $in_macro = $ARGV[0]; my $alpha_config = $ARGV[1]; if ($#ARGV!=1) { print "USAGE :: perl bias_vol_chk.pl <<CELL_NAME>> <<config_FILE>> + \n\n" ; exit(1); } open (ALPHAFILE,"<","$alpha_config") || die "Can not open config_FILE" +; my @alpha_file = <ALPHAFILE>; my $pvt_name; my $bias_voltage; my @bias_voltage; for(my $i=0;$i<= $#alpha_file -1;$i++) { my $line = $alpha_file[$i]; chomp $line; #print "$line \n"; if ($line =~m/\s*cornerData\((.*)\)\s*\{(.*),TEMP\s*(.*)/g) { $pvt_name = $1; $bias_voltage = $2; print "$pvt_name\n"; print "$bias_voltage\n"; @bias_voltage = split (',',$bias_voltage); if ($pvt_name =~m/^([a-z].*)([0-9]p.*)/) { my $process = $1; my $process_two = substr($process, 0, 2); #got ff from ffgp my $vol_temp = $2; my @vol_temp = split ('v',$vol_temp); my $temp = @vol_temp[1]; my $volt_1 = @vol_temp[0]; $volt_1 =~ s/[0]$//; @vol_temp[0] =~ s/[0]$//; my $volt_2 = @vol_temp[0]; my @volt_2 = split('p',$volt_2); $volt_2 = join('.',@volt_2); #replacing p with . my $file_name1 = "$in_macro/lib_pg/$in_macro\_$pvt_name\_pg.lib" ; my $file_name2 = "$in_macro/lib_pg/$in_macro\_$process_two$volt_1\ +v$temp\_pg.lib" ; #print "$file_name2\n"; if( -e $file_name1) { open (LIBFILE,"<","$file_name1") or die "Can not open INPUT lib +erty file $in_macro/lib_pg/$in_macro\_$pvt_name\_pg.lib"; my @lib_file = <LIBFILE>; for(my $j=0;$j<= $#lib_file -1;$j++) { my $libline = $lib_file[$j]; chomp $libline; if ($libline=~m/^\s*voltage_map\((.*)\)/g) { my @volt_array = ("$1"); my $lib_volt = $1; my @lib_volt = split (',',$lib_volt); print "@lib_volt \n"; #print " @lib_volt[0] @lib_volt[1]\n"; } } } if( -e $file_name2) { open (LIBFILE,"<","$file_name2") or die "Can not open INPUT l +iberty file $in_macro/lib_pg/$in_macro\_$process_two$volt_1\v$temp\_p +g.lib"; my @lib_file = <LIBFILE>; for(my $j=0;$j<= $#lib_file -1;$j++) { my $libline = $lib_file[$j]; chomp $libline; if ($libline=~m/^\s*voltage_map\((.*)\)/g) { my @volt_array = ("$1"); my $lib_volt = $1; my @lib_volt = split (',',$lib_volt); print "@lib_volt \n"; #print " @lib_volt[0] @lib_volt[1]\n"; } } } } } }
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