Although I don't have enough time at the moment to even play with a solution - I wish I did - I'll throw my initial thought out there anyway: This sounds like something that could be handled very well by an FPGA. Sure, it would require a specialized hardware solution with code written in VHDL or Verilog by someone who knows that field, but nowadays there are extremely powerful FPGAs out there that can access loads of external RAM at incredibly high speeds (e.g. the Virtex family from Xilinx). So admittedly, unless you know VHDL/Verilog and happen to have an eval board lying around, that may only be worth the investment if this is one of your large-scale "save the customer millions of pounds" type projects :-)

In reply to Re: Why Boyer-Moore, Horspool, alpha-skip et.al don't work for bit strings. (And is there an alternative that does?) by Anonymous Monk
in thread Why Boyer-Moore, Horspool, alpha-skip et.al don't work for bit strings. (And is there an alternative that does?) by BrowserUk

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