Create your own function! you might want to look at this: Extend a module Thus, something like this (untested)

use Verilog::Netlist::Net;
sub Verilog::Netlist::Net::my_dump_drivers { 
    my $self = shift;
    my $indent = shift||0;
    my @ret;
    push @ret, " "x$indent,"Net:",$self->name,"\n";
   
    
    if (my $port = $self->port) {
    push @ret, " "x$indent,"  Port: ",$port->name,"  ",$port->directio
+n,"\n";
    }
    foreach my $cell ($self->module->cells_sorted) {
    foreach my $pin ($cell->pins_sorted) {
        if ($pin->port && $pin->net && $pin->net == $self) {
        push @ret, " "x$indent,"  Pin:  ",$cell->name,".",$pin->name
            ,"  ",$pin->port->direction,"\n";
        }
        elsif ($pin->net && $self->name eq $pin->net->name) {
        push @ret, "%Warning: Internal net name duplicate: ".$cell->na
+me."  ".$self->name."\n"
            .$self->comment."  ".$pin->net->comment."\n"
            ."$self  ".$pin->net->name."\n";
        }
    }
    }
 return @ret;
}
[download]

Lateron, you just use @A = my_dump_drivers() instead of dump_drivers(), capturing the output, etc...

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