use warnings FATAL => 'all'; use strict; use Verilog::VCD qw(parse_vcd); my $file = shift; my $vcd = parse_vcd($file); for my $code (keys %{ $vcd }) { my $name = "$vcd->{$code}{nets}[0]{hier}.$vcd->{$code}{nets}[0]{n +ame}"; my $times = @{ $vcd->{$code}{tv} }; for my $aref (@{ $vcd->{$code}{tv} }) { print "$name @{ $aref }\n"; } } __END__ JUNKSIGNALS_TB.RIGHT 0 1 JUNKSIGNALS_TB.RIGHT 10 0 JUNKSIGNALS_TB.SERIAL 0 1 JUNKSIGNALS_TB.I2 0 0 JUNKSIGNALS_TB.DUTJNKCELL.lnx5_out 0 0 JUNKSIGNALS_TB.DUTJNKCELL.lnx3_out 0 0 JUNKSIGNALS_TB.DUTJNKCELL.lnx4_out 0 1 JUNKSIGNALS_TB.I1 0 0 JUNKSIGNALS_TB.DUTJNKCELL.lnx2_out 0 1 JUNKSIGNALS_TB.DUTJNKCELL.lnx2_out 10 0 JUNKSIGNALS_TB.ZEN 0 1 JUNKSIGNALS_TB.ZEN 10 0 JUNKSIGNALS_TB.DUTJNKCELL.lnx0_out 0 0 JUNKSIGNALS_TB.DUTJNKCELL.lnx0_out 10 1 JUNKSIGNALS_TB.DUTJNKCELL.lnx1_out 0 0 JUNKSIGNALS_TB.DUTJNKCELL.lnx1_out 10 1 JUNKSIGNALS_TB.I0 0 0 JUNKSIGNALS_TB.I0 10 1
If you can explain in words what you are trying to accomplish, I can try to help (I speak Verilog). Also keep in mind that hashes are un-ordered in Perl, and generally, you want to sort the keys.
UPDATE: A few years ago, some translated this Perl code to Python: https://pypi.python.org/pypi/Verilog_VCD
In reply to Re: Why are Hash keys different for the same hash? Confusing. (VCD)
by toolic
in thread Why are Hash keys different for the same hash? Confusing.
by Anonymous Monk
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