If your Verilog files are very simple, you don't even need Perl. You can just use grep: 
grep -w module *.v

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If your files are not so simple, then you should use a Verilog parser: Verilog-Perl. For example, if some of your modules are commented out, or if the module keyword is not on the same line as the module name, etc.

In reply to Re: Parse for a name after a keyword search in all the files, given directory as input (Verilog) by toolic
in thread Parse for a name after a keyword search in all the files, given directory as input by prash_sri

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