Try:
That should allow you to identify whether the delays are on the outbound leg, during generation, or the return part of the circuit. It won't tell you what caused it, but if you know when they are occuring, it will narrow the possibilities somewhat.
In reply to Re: Timing concerns on PerlEX/Mod_Perl
by BrowserUk
in thread Timing concerns on PerlEX/Mod_Perl
by Anonymous Monk
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