HI everyone,This is the block which i have to read 

   input [31:0]           ucast_mem_wdata;
   input [31:0]           ucast_mem_wren;
   input               ucast_mem_wr;
   input               ucast_mem_rd;
   output [31:0]           ucast_mem_rdata;

   wire [BMU_MEM_ADDR_BITS-1:0]   mem_addr; always @ (posedge sys_clk 
+or negedge sys_reset_n)
     begin
    if (!sys_reset_n)
      ucast_int_mem_rd_r <= 0;
    else
      ucast_int_mem_rd_r <= ucast_int_mem_rd & !ucast_access;
     end


endmodule

[download]
This is the file i have to read From the above file.I have to read inputs and output and always blcoks into differant files I succeed in reading inputs and outputs but i didnt get the logic how to read the entire always block into the file

In reply to Reading block by ravi030

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