You are right... Verilog::VCD can only be used to parse VCD files. It can not create a VCD file. I am not aware of any CPAN module which can create a VCD file. This looks like an opportunity for you to contribute.

Why do you need Perl code to create a VCD file? All Verilog simulators can create VCD files.

In reply to Re^3: Someone please verify this. (Verilog::VCD) by toolic
in thread Someone please verify this. by ksangam

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