Yeah, if I was just running this as ordinary C code the parentheses would be superfluous. What's happening is that the parentheses are used to let a C-to-VHDL compiler get the idea of what kind of adder structure I want. I have a series of floating point multipliers at the base level. The output of two multipliers is summed together in a 2-input floating-point addition unit. The output of these additions are summed again in pairs in a further layer of adders. This continues with the adders halving each time until you finish up with a single adder and your output. This allows all the multiplication and addition to take place in parallel. Sweet, eh?

A0 B0  A1 B1  A2 B2  A3 B3   
 \ /    \ /    \ /    \ /
 (*)    (*)    (*)    (*)
   \    /        \    /
    \  /          \  /
    (+)            (+)
      \            /
       \          /
        \        /
         \      /
          \    /
           \  /
           (+)
            |
          Output
[download]