in reply to I am designing a logic simulator but stuck.
I don't know why OP's disappeared (I suspect the he deleted it after being urged to use readmores or a briefer example), but just in case someone is looking for what should follow (and once did) the words "something like this: " here it is ... inside readmores:
#Logic Gates Routines $t=0; $a=0; LAB: { if($gate[$t] eq "INV") { $mystring= @raw_data[$a]; OUTER: while($mystring =~ m/(\d+)/g) { print "\r\n"; push (@new, $1); } print "\r\n"; print @new; print " rerwerwe \r\n"; $inp=$new[0]; $out=$new[1]; print "\r\n"; print $net[$out-1]; print "\r\n"; print "$out \r\n"; if ($net[$inp-1] eq "1") { @net[$out-1]=0; $gate[$t]=0; $t++; print "fef"; last LAB; } elsif ($net[$inp-1] eq "0") { $net[$out-1]=1; $gate[$t]=0; $t++; last LAB; } else { $t++; last LAB; } } if($gate[$t] eq "BUF") { $mystring= @raw_data[$a]; OUTER: while($mystring =~ m/(\d+)/g) { print "\r\n"; push (@new, $1); } print @new; print "\r\n"; $inp=$new[0]; $out=$new[1]; if ($net[$inp-1] eq "1") { $net[$out-1]=1; $gate[$t]=0; $t++; last LAB; } elsif ($net[$inp-1] eq "0") { $net[$out-1]=0; $gate[$t]=0; $t++; last LAB; } else { $t++; last LAB; } } if($gate[$t] eq "AND") { $mystring= @raw_data[$a]; OUTER: while($mystring =~ m/(\d+)/g) { print "\r\n"; push (@new, $1); } print @new; print "\r\n"; $inp1=$new[0]; $inp2=$new[1]; $out=$new[2]; print $net[$inp1-1]; $new=$net[$inp1-1]; $new1=$net[$inp2-1]; $new2=$net[$out-1]; print "\r\n"; print $net[$inp2-1]; print "\r\n"; if($new == 1) { if($new1 ==1) { $net[$out-1]=1; print $net[$out-1]; $gate[$t]=0; $t++; print "fesf"; last LAB; } elsif($new1 ==0) { $net[$out-1]=0; print $net[$out-1]; $gate[$t]=0; $t++; print "g"; last LAB; } } if(($new) or ($new1) == 0) { $net[$out-1]=0; print $net[$out-1]; $gate[$t]=0; $t++; last LAB; } else { print "fersf"; } } if($gate[$t] eq "NAND") { $mystring= @raw_data[$a]; OUTER: while($mystring =~ m/(\d+)/g) { print "\r\n"; push (@new, $1); } print @new; print "\r\n"; $inp1=$new[0]; $inp2=$new[1]; $out=$new[2]; print $net[$inp1-1]; $new=$net[$inp1-1]; $new1=$net[$inp2-1]; $new2=$net[$out-1]; print "\r\n"; print $net[$inp2-1]; print "\r\n"; if($new == 1) { if($new1 ==1) { $net[$out-1]=0; print $net[$out-1]; $gate[$t]=0; $t++; print "fesf"; last LAB; } elsif($new1 ==0) { $net[$out-1]=1; print $net[$out-1]; $gate[$t]=0; $t++; print "g"; last LAB; } } if(($new) or ($new1) == 0) { $net[$out-1]=1; print $net[$out-1]; $gate[$t]=0; $t++; last LAB; } else { $t++; last LAB; } } if($gate[$t] eq "OR") { $mystring= @raw_data[$a]; OUTER: while($mystring =~ m/(\d+)/g) { print "\r\n"; push (@new, $1); } print @new; print "\r\n"; $inp1=$new[0]; $inp2=$new[1]; $out=$new[2]; print $net[$inp1-1]; $new=$net[$inp1-1]; $new1=$net[$inp2-1]; $new2=$net[$out-1]; print "\r\n"; print $net[$inp2-1]; print "\r\n"; if(($new)== 1) { $net[$out-1]=1; print $net[$out-1]; $gate[$t]=0; $t++; last LAB; } elsif(($new1)== 1) { $net[$out-1]=1; print $net[$out-1]; $gate[$t]=0; $t++; last LAB; } elsif(($new) == 0) { if(($new1) == 0) { $net[$out-1]=0; print $net[$out-1]; $gate[$t]=0; $t++; last LAB; } elsif(($new1) == 1) { $net[$out-1]=1; print $net[$out-1]; $gate[$t]=0; $t++; last LAB; } } else { $t++; last LAB; } } if($gate[$t] eq "NOR") { $mystring= @raw_data[$a]; OUTER: while($mystring =~ m/(\d+)/g) { print "\r\n"; push (@new, $1); } print @new; print "\r\n"; $inp1=$new[0]; $inp2=$new[1]; $out=$new[2]; print $net[$inp1-1]; $new=$net[$inp1-1]; $new1=$net[$inp2-1]; $new2=$net[$out-1]; print "\r\n"; print $net[$inp2-1]; print "\r\n"; if(($new)== 1) { $net[$out-1]=0; print $net[$out-1]; $gate[$t]=0; $t++; last LAB; } elsif(($new1)== 1) { $net[$out-1]=0; print $net[$out-1]; $gate[$t]=0; $t++; last LAB; } elsif(($new) == 0) { if(($new1) == 0) { $net[$out-1]=1; print $net[$out-1]; $gate[$t]=0; $t++; last LAB; } elsif(($new1) == 1) { $net[$out-1]=0; print $net[$out-1]; $gate[$t]=0; $t++; last LAB; } } else { $t++; last LAB; } } } print "@net \r\n"; print "@gate \r\n"; exit 0;
And, there's more:
At some points, the loop would work but at some point, it would just execute it even when the conditions have not been satisfied.
This is the other part of my code which is working fine.
open(DAT, $data_file) || die("Could not open file!"); @raw_data=<DAT>; $int=0; #calculating the number of gates: $mystring = @raw_data; while($mystring =~ m/(\d+)/g) { print "\r\n"; $lines= $1; $lines= $lines-2; } print "The number of gates is " . $lines ; print "\r\n"; $linez=$lines+2; #calculating the number of nets: #max is the number of nets $a=0; while($a<=$linez) { $mystring= @raw_data[$a]; while($mystring =~ m/(\d+)/g) { print "$1 \n"; push(@array1, $1); } print "\r\n"; my $max = max(@array1); push(@netsize, $max); $a++; } my $max = max(@netsize); print "\r\n"; #initializing the nets to 2 $n=0; while ($n<=$max-1) { @net[$n]=2; $n++ } print "The net array is @net \r\n"; print "Please enter the input vectors"; #The number of inputs $z=0; $mystring = @raw_data[-2]; while($mystring =~ m/(\d+)/g) { print "\r\n"; $z++; } $z--; print "The number of inputs are $z \r\n"; print "The number of gates is $lines \r\n"; print "The number of nets are $max \r\n"; print "The number of gates are $lines \r\n"; print "Enter the inputs \r\n"; #Getting the value of the gates: $mystring= @raw_data[-2]; while($mystring =~ m/(\d+)/g) { print "Enter the vector for input $1 \r\n"; $ip = <STDIN>; @net[$1-1]=$ip; } print "\r\n"; print "@net[2] \r\n"; #pushing the gates in the array: $b=0; $a=0; while($a!=$lines) { $mystring = @raw_data[$a]; if($mystring =~ /\A(.*?) /) { print "The gate is $1"; print "\r\n"; @gate[$b]=$1; $b++; } $a++; } join(",",@gate); join(",",@net); print "The net array is @net \r\n"; print "The gate array is @gate \r\n";
|
|---|
| Replies are listed 'Best First'. | |
|---|---|
|
Re^2: I am designing a logic simulator but stuck.
by Steven_gerrard (Initiate) on Sep 19, 2011 at 04:54 UTC |