in reply to Determining the minimum representable increment/decrement possible?

You have one heck of a complicated question!
There are additional complications with the Intel FPU in terms of reproducible results. The FPU uses 80 bits internally for its calculations so its using more bits for intermediate calculations than went in. You may find this article of interest: Intel FPU Precision . As opposed to your commonly quoted link above, this one is more like: "What most computer scientists probably don't need to know about floating point"! However some of this may be required for your question. I hope this "how the guts work" article helps in at least what the hardware is doing part.
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Re^2: Determining the minimum representable increment/decrement possible?
by BrowserUk (Patriarch) on Jun 15, 2016 at 16:07 UTC
    The FPU uses 80 bits

    That's true of the old 8087 FPUs (and later on-chip compatible units), but (almost*) no compiler more than say 7 or 8 years old still uses the old 80-bit fpr0 .. fpr8 registers and associated instructions.

    My cpu is ~10 years old, and it has MMX (only uses the lower 64-bits of the 87-style registers. ) and SSE, SSE2, SSE3, SSSE3, which use the lower 64-bits of the 128-bit xmmm register set.

    (*The D compiler provides a 80-bit fp native type.)


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