Perhaps you can include the generated parser, like how it's done in Verilog::Parser? There's still the original sources included for those who would like to hack on it; in that case you need flex/bison.

In particular, to address the question of the makefile, look here for inspiration

-Thomas
"Excuse me for butting in, but I'm interrupt-driven..."

In reply to Re: User-side module building with ExtUtils::MakeMaker by thomas895
in thread User-side module building with ExtUtils::MakeMaker by merkys

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