If your input will have at most 1 set of curlies per line, this works: 
use warnings;
use strict;

while (<DATA>) {
    chomp;
    my $concat;
    if (s/({.+})/{}/) { # replace curlies' contents with just curlies 
+for now
        $concat = $1;
    }
    my @words = split /[(,]/;
    $words[2] = $concat if $concat;
    print "writing.reg($words[1]).write($words[3],$words[2]);\n";
}

__DATA__
write_x("top.inst1.inst2.reg",32'h30,status,"string");
write_x("mod.ins5.ins7.val",{24'h0,4'h2,variable1,variable2},status,"s
+tring");

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It looks like you are parsing Verilog. If so, take a look at Verilog-Perl because (you are about to find out that) parsing Verilog is not trivial.

In reply to Re: want to ignore pattern under{} in split command by toolic
in thread want to ignore pattern under{} in split command by jag194u

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